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2011-08-30 22:20:37 ???????? ?????0 ?????
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DRIE?????????????????????????????????????У????????????????3D TSV??????????????????????CMOS MEMS??????MEMS??????????????????????????????£????????????е?????MEMS???????г??????е???????????????????????????????CMOS?????????????????CMOS??????MEMS???????????????????CMOS MEMS???????????????????????????MEMS????????????????????????????????????MEMS?????????????????????????????????????ɡ??г??????????
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2000 | 2010 | 2020 | |
MEMS die size | 10 mm2 | ~2-3 mm2 | 1-2 mm2 |
Packaged die size | 2x5x5 mm3 | QFN package (3.0 mm x 3.0 mm, height 0.9 mm) | < 1x2x2 mm3 |
Power consumption | 0.1 mW | 0.05 mW | < 0.05 mW |
MEMS ASP ($) | >$3 (3-axis) | $0.7 | <$0.5 |
Volume (Munits) | 35 | 771 | >2500 |
Major manufacturing evolution |
• 4” & 6” wafer size • Integrated MEMS from AD • Mostly wire bonding side by side |
• 6” and 8” emerging • SOI wafers and epiPoly Si approaches (3μ thick proof mass) • AD shifts to hybrid • Stacked/side by side wire bonded MEMS & ASIC |
• Mostly 8” wafer size • Capping is removed • ASIC becomes the active capping • 3D TSV implemented |
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